Spinlock.h

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/* ############################ MALP License ############################## */
/* # Fri Jan 18 14:00:00 CET 2013                                         # */
/* # Copyright or (C) or Copr. Commissariat a l'Energie Atomique          # */
/* #                                                                      # */
/* # This software is governed by the CeCILL-C license under French law   # */
/* # and abiding by the rules of distribution of free software.  You can  # */
/* # use, modify and/ or redistribute the software under the terms of     # */
/* # the CeCILL-C license as circulated by CEA, CNRS and INRIA at the     # */
/* # following URL http://www.cecill.info.                                # */
/* #                                                                      # */
/* # The fact that you are presently reading this means that you have     # */
/* # had knowledge of the CeCILL-C license and that you accept its        # */
/* # terms.                                                               # */
/* #                                                                      # */
/* # Authors:                                                             # */
/* #   - BESNARD Jean-Baptiste jean-baptiste.besnard@cea.fr               # */
/* #                                                                      # */
/* ######################################################################## */

#ifndef SPINLOCK_H
#define SPINLOCK_H

#ifdef __cplusplus
  extern "C"
  {
#endif

#define i686_ARCH

typedef volatile unsigned int MALP_Spinlock;

#if defined(i686_ARCH) || defined(x86_64_ARCH)
static __inline__ int  tracelib_test_and_set(MALP_Spinlock * atomic)
{
        int ret;
        __asm__ __volatile__("lock; xchgl %0, %1": "=r"(ret), "=m"(*atomic): "0"(1), "m"(*atomic):"memory");
        return ret;
}
static __inline__ void  cpu_relax(void)
{
        __asm__ __volatile__("rep;nop":::"memory");
}
#elif defined(ia64_ARCH)
static __inline__ int  tracelib_test_and_set(MALP_Spinlock * atomic)
{
        int ret;
        __asm__ __volatile__("xchg4 %0=%1, %2": "=r"(ret), "=m"(*atomic): "0"(1), "m"(*atomic):"memory");
        return ret;
}
static __inline__ void  cpu_relax(void)
{
        __asm__ __volatile__("hint @pause":::"memory");
}
#elif defined(sparc_ARCH)
static __inline__ int  tracelib_test_and_set(MALP_Spinlock * atomic)
{
        char ret = 0;
        __asm__ __volatile__("ldstub [%0], %1": "=r"(spinlock), "=r"(ret): "0"(spinlock), "1"(ret):"memory");
        return (unsigned) ret;
}
static __inline__ void  cpu_relax(void)
{
        sched_yield();
}
#endif

int MALP_Spinlock_lock(MALP_Spinlock * atomic);

int MALP_Spinlock_unlock(MALP_Spinlock * atomic);

int MALP_Spinlock_trylock(MALP_Spinlock * mutex);

#ifdef __cplusplus
  }
#endif

#endif  /* SPINLOCK_H */